January 11, 2014

Thaiphoon Burner Super Blaster has been proudly presented! Since December 2013 we have been working hard on the new version of Thaiphoon Burner. Our goal was to support the latest JEDEC DDR4 standard. Now the program fully supports both typical 2-Kbit and 4-Kbit SPD images to be specific for new DDR4 EEPROM chips. In accordance with the latest JEDEC DDR4 SPD specification the program is capable of decoding SPD bytes and creating exhaustive reports on DDR4 DIMM modules. For swift modification of timing delays in SPD we developed the Timing Table Editor for DDR4 modules. Its new GUI conception has moved to the Timing Table Editor for DDR3. All other dialogs, such as Product Details, Addressing and Capacity, were modified to let the user to edit appropriate parameters for DDR4 modules too. The “Import from clipboard” function can convert 4-Kbit text SPD dumps to the native format. Much work has been done in an effort to maintain the database structure of the SPD Browser. Now the database can store both 2-Kbit and 4-Kbit SPD dumps with no change for its structure. The SPD Browser uses a new improved algorithm to search for SPD dumps. Besides, it features a new query called “Architecture-compatible SPD dumps” to help users to find SPDs to be compatible with their memory modules. In January 2011 we have got an idea about generating SPD on the base of a minimal set of the main parameters. But only now, since 3 years, we have embodied that idea! On the main toolbar Thaiphoon Burner has a new “Create” button which is used to create a SPD for DDR3 and DDR4 modules through a separate user-friendly dialog. To access I2C devices the Intel X99 SMBus Controller has been supported.

January 28, 2014

Thaiphoon Burner Super Blaster has been released! The new application update brings support for the latest JEDEC DDR4 SPD Specification Release 2 dated to January 2014. The main changes of the specification have affected the functionality of the DDR4 Timing Table Editor: JEDEC Speed Bins combobox now lists extra 16 standard JEDEC profiles for DRAM modules with 3D stacked SDRAM chips. Besides, DDR4 Timing Table Editor now rounds and ceils real values with correct precision.

February 10, 2014

Thaiphoon Burner Super Blaster has been released! For DDR3 and DDR4 SDRAM modules the "Die count" value from SPD is no longer used to calculate total DIMM Capacity. The use of that parameter was a mistake because of a lack in description from JEDEC. The previous implementation of "Product and Capacity" dialog box did not program Manufacturer ID code correctly. Just as some of DIMM manufacturers, we did not take into account an "Odd parity" bit that is required for DDR3 and DDR4 module manufacturers with "odd continuation" codes and cleared that bit when setting a new Manufacturer ID. Now that mistake is fixed. In accordance with the latest revision of the JEDEC JEP106 document the new DRAM module manufacturer IDs have been added. The new additional “Save Groups on close” option has been added to a context menu of the Dumpbar which is used to save Dumpbar groups on closing Thaphoon Burner window automatically. "Connector to SDRAM Bit Mapping" values are now programmed by SPD generator when creating a new SPD dump for DDR4 unbuffered DIMMs.

May 1, 2014

Thaiphoon Burner Super Blaster has been released! For displaying technical information from SPD in a compact form the third "Summary Mode" has been added. It is used by default and it groups information into two blocks of "Memory Module" and "DRAM Component". Each block contains the most significant SPD data specific to DIMM and DRAM components. The "Summary Mode" does not replace the "Full Report", but it is more convenient for visual perception. A color scheme of the "Summary Mode" is adjustable through the "View" main menu. Next, the Dumpbar has been renamed to "Shortcut menu". Its context menu has renamed commands too. Besides, the user is informed about "dead" menu shortcuts to SPD dump files that were accidentally removed or deleted and SPD entries excluded from the SPD database. The "Product details" form features the "Options" main menu and its one command to set the current week and year. Added support for the latest DDR3 SPD Specification 1.3 released on February 2014. SPD dumps for LRDIMMs are correctly found in the databases by the updated version of SPD Browser. BEMP Enhancer has been removed as it is no longer supported by the latest AMD AOD utility.

June 4, 2014

Thaiphoon Burner Super Blaster has been released! This new update adds the third “Thermal Sensor” column to the report created in Summary Mode. The column is displayed once the combined SPD EEPROM with Thermal Sensor has been detected. To access Thermal Sensor registers on LGA2011 platform the new support for Intel’s Xeon/Core i7 dedicated SMBus controller has been added. In accordance with the recently released JEDEC documents the SPD Generator (Create New dialog box) sets SPD values for DQ Mapping both for non-ECC and ECC DDR4 SO-DIMM. Improved XMP Enhancer. Since ASUS disabled SPD Write commands in its latest product of MAXIMUS VII GENE with Z97 chipset, Thaiphoon Burner performs checking for this limitation and notifies when it is set within 9 series Intel chipset SMBus controllers.

July 4, 2014

Thaiphoon Burner Super Blaster has been released! Further development of the Summary Mode brings a logically expected improvement – the timing table is now placed under the two information blocks of “Memory Module” and “DRAM Component”. This is exactly what users need when providing with information on memory modules. The timing table is created for all PC memory standards from PC SDRAM to DDR4 SDRAM. For Hynix DDR3 SDRAM modules Thaiphoon Burner determines the Part Number of used SDRAM chips. You can find it the SPD report. In accordance with the latest Hynix DDR4 SDRAM part numbering specification the program decodes Part Numbers of memory modules and provides details in the SPD report.

August 8, 2014

Thaiphoon Burner Super Blaster has been released. In "Summary Mode" the program now displays the XMP Table if available which is placed under the Timing Table. For all original DDR3 SDRAM modules produced by Samsung Semiconductor the part number of employed SDRAM chips is detected. The part number is constructed on the base of SPD parameters and some of codes of the part number of the module. Thaiphoon Burner’s SPD database now includes the first 14 original SPD dumps for Micron Technology DDR4 SDRAM modules. Due to that the new version of the program now has a capability of part number decoding for Micron DDR4 SDRAMs. SPD Browser has been improved to display search information for Micron DDR4 modules.

September 14, 2014

Thaiphoon Burner Super Blaster has been proudly presented! With long-awaited support for Intel XMP 2.0 the new version brings exceptional features for field application engineers who work with SPD and DRAM modules. Designed specifically for DDR4 SPD the new XMP Enhancer Professional fully meets the final release 1.0 of the Intel XMP 2.0 Specification. The purpose of this powerful and simple to use editor is to create, modify and fine-tune XMP 2.0 profiles. XMP 2.0 integration can be done in few clicks without messing with the initial specification! The result can be immediately observed in the Report. Thaiphoon Burner decodes entire XMP 2.0 data array to the main report and builds a timing table for specific profiles. DDR4 Timing Table Editor has a capability of one-click overwriting factory-programmed SPD timings with ones from XMP 2.0. SPD Generator has been significantly improved for DDR3 and DDR4 UDIMMs as to setting raw card dimensions, DQ mapping, mirroring, etc.

September 27, 2014

Thaiphoon Burner Super Blaster has been released. Minor improvements to SMBus interface initialization specific for the Intel LGA2011 platform were made. The annoying messagebox about disabled SMBus Write command on this platform is no longer displayed when you start the program. Our investigations confirm that this hardware feature has a poor implementation and lets SPD EEPROM programming despite it is enabled through the SMBus controller registers. After fixing some errors, the HEX Editor now lets you create new SPD dumps from scratch. SPD Browser has been updated to version It has a new capability of looking up SPD dumps with XMP 2.0 profiles. For estimating CPU/memory performance the time required for lookup operations is displayed by SPD Browser on its statusbar. Minor patches to FB-DIMM SPD decoder have been applied. The total number of identified 2-Kbit and 4-Kbit SPD EEPROM devices with thermal sensor has been extended to 21.

October 4, 2014

Thaiphoon Burner Super Blaster has been released. The new update is dedicated to AVEXIR Corporation - one of the global PC memory manufacturers from Taiwan. As a result, the AVEXIR logo is placed on the main window of Thaiphoon Burner. Among the new features there is an intellectual function of taking snapshots. The function is available in “Summary Mode” and takes snapshots without GUI elements of the program and saves them to PNG format. So, the final snapshot contains only useful information what saves your time and does not require additional cutting actions in a graphic editor. Besides, a watermark can be placed onto a snapshot. This feature is very handy for hardware reviewers. We aimed to replace traditional software for obtaining SPD information with Thaiphoon Burner. For the moment the AVEXIR logo is used as a watermark. Another change is improved color schemes for summary reports. The white color scheme is now used by default.

October 18, 2014

Thaiphoon Burner Super Blaster has been released. Previous implementation of SPD Generator has been incorrectly calculating a Page Size. For this reason all of the Page Size dependant timings from standard Speed Bins did not conform to JEDEC JESD79-3 and JESD79-4 standards. The error has been fixed. DDR4 DIMM Label is now formed in accordance with the JEDEC Item #2224.06 specification. Nominal dimensions are now reported for all types of DDR4 SDRAM modules. The SPD Write Dialog has been improved to support DDR4 SPD specific address ranges. The XMP table created for DDR3 SDRAM modules in the Summary Mode might display incorrect delays for tRCD and tRP timings. The bug has been fixed as well.

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Project by Vitaliy Jungle
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Company Location
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