January 1, 2013
Thaiphoon Burner Super Blaster 126.96.36.199 has been proudly presented! The new user interface conception finally enables opening of SPD dump files in one main window of Thaiphoon Burner program. All opened files are arranged into groups on a separate panel called “Dumpbar”. The Dumpbar has its own context menu to manage the groups and lets the user quickly open a new Dumpbar from a configuration specific file. The Dumpbar can store SPD dumps being opened from both SPD image files and Thaiphoon Burner SPD databases. Another good addition is a full support for SPD of 64 GB DRAM modules. This has been reached thanks to Micron Technology since the “Serial Presence Detect for DDR3 SDRAM” document still has not been updated by JEDEC. However, the main feature of the new version is accessing SPD EEPROM device through the build-in SMBus Controller of the Intel LGA-2011 series processors. This enables the program to read and write SPD data on the latest Intel server and desktop platforms equipped with Intel Xeon and Core i7 Sandy Bridge E/EP code-named processors.
May 25, 2013
Thaiphoon Burner Super Blaster 188.8.131.52 has been released. The latest version of the program supports the low power "Lynx Point" Intel 8-series SMBus controller for accessing SPD EPPROM on laptops. The i2c module has been patched to support SPD programming though the on-die SMBus controller of the Intel Atom processor S1200 Series for microservers. The program now reads some DMI information which is included in the device dump report to help us to resolve your issues with Thaiphoon Burner. Improved and tested SPD reading on SiS 645DX chipsets. For DDR3 SDRAM modules manufactured by Samsung the Lot Number is displayed in the report. For LR-DIMM modules the report includes some extra information. Thaiphoon Burner now decodes the manufacturing location IDs of being specific for Ramaxel modules.
September 10, 2013
Thaiphoon Burner Super Blaster 184.108.40.206 has been released. Our goal in this new version is to prepare Thaiphoon Burner for the upcoming release of DDR4 Standard. Before the mass release of new DDR4 SDRAM modules the program supports 4-Kbit SPD array of 512-bytes Serial EEPROMs. In order not to change the usability of the HEX Editor and maintain the minimum height of the main Thaiphoon Burner window, switching between the two 256-byte banks of the EEPROM device is done easily by clicking on one of the two new buttons used for each bank. Besides, we have added identification of several new combination TS and 4-Kbit SPD EEPROMs being specific for DDR4 SDRAM modules. To access data from DDR4 SPD EEPROM some new SMBus Host Controllers of future Intel “Wellsburg” code-named chipsets have been supported. Another important addition is a capability of reading SMBus slaves on the LGA-2011 based platform. SPD reading and writing capabilities on the LGA-2011 based platform have been improved and successfully tested on Xeon E5-series processors. Added model identification of Registers manufactured by Inphi and IDT for registered DDR3 memory modules.
November 14, 2013
Thaiphoon Burner Super Blaster 220.127.116.11 has been released. The newest release improves XMP Enhancer that has been updated to version 18.104.22.168. More standard JEDEC speed bins under “Templates” let users test over-clocking capabilities of their DRAM modules writing those as XMP profiles. Previews standard templates have been corrected and improved as to voltages and supported CAS Latencies. The new “Apply to all SPD EEPROM devices” option has been added to XMP Enhancer as well as to DDR3 Timing Table Editor allowing the user to write changes to SPD EPROMs of all installed DRAM modules. The new ATi/AMD SMBus device communication protocol has been written and isolated from a universal VIA/ATI/AMD routine in a separate procedure. Added identification for a few 2-Kbit Catalyst SPD EEPROM chips with thermal sensor. Added model identification of DDR3 registers manufactured by Texas Instruments.